digital demodulator copyright ? 2015 by silicon laboratories 10.29.2015 hdtv mpeg s.o.c. si2166b host_scl host_sda front end osc & pll qpsk 8psk demod s_adc_in s_adc_ip s_adc_qn s_adc_qp adc (i) adc (q) equal- izer i 2 c switch tun_sda tun_scl gpio ctrl mpeg ts interface i 2 c i/f mp_x gpio_0 resetb 1.2, 3.3v dsp & synchro dvb-s/s2 fec module diseqc tm 2.0 diseqc_in diseqc_out agcs ext. clk or xtal qpsk / 8psk satellite zif tuner clk_in_out ldpc bch viterbi rs ts_err/ gpio_1 ts_sync ts_val 8 ts_clk ts_data SI2166-B22 dvb-s/s2 satellite tv demoulator desrition the SI2166-B22 integrates dvb-s, dvb-s2 (amc-compliant), and dss digital demodulators into a single cmos chip for the broadest range of satellite tv standards. leveraging silicon labs' proven digital demodulation architecture, the SI2166-B22 achieves superior satellite reception performance while minimizing front-end design complexity and cost. the satellite demodulation functionality allows demod ula ting widely deployed dvb-s, directv? (dss) legacy standards, and dvb-s2 satellite broadcast. a zero-if interface with two high-speed adcs allows for a seamless connection to mark et proven satellite silicon tuners. constant coding mo dulation (ccm), qpsk/8psk demodulation schemes and broadcast profile are the main specifications of the dvb- s2 demodulator. silicon labs' innovative ldpc and bch decoding architecture delivers best-in-class reception while exhibiting low power dissipation. for dvb-s/dss standards, an innovative and advanced fec de codin g scheme is implemented resulting in higher performance. the SI2166-B22 offers an on-chip blind scanning algorithm fo r dvb-s and dvb-s2 standards (as well as blind lock function). it also integrates diseqc? 2.0 lnb interface for satellite dish control. the SI2166-B22 programmable transport stream interface provid es a flexible range of output modes and is fully compatible with all mpeg decoders or conditional access modules to support any customer application. SI2166-B22 is fully api compatible with si2164/69/68/67. features - dvb-s2 (etsi en 302 307 and tr102-376) - qpsk/8psk demodulator and fec decoder - broadcast profile: ccm, 64800 bits frame, single ts - 1 to 45 msymbol/s (optimized for 2 to 32 msymbol/s) - directv? amc compatible - dvb-s (etsi en 300 421) - qpsk demodulator and enhanced fec decoder - 1 to 45 msymbol/s - directv? dss supported - diseqc? 2.0 interface and unicable support - i 2 c serial bus interfaces (master and host) - two adcs with differential inputs (zif input) - gpios and multi-purpose ports for independent agcs (up to 4) to control satellite tuner - firmware control for upgradeability - flexible ts interface with serial or parallel single output - fast lock times for all media - only two power supplies: 1.2 and 3.3 v - pin-to-pin and api compatibility with si2164/69/68/67 - 7x7 mm, qfn-48 pin package, pb-free/rohs compliant applications - full-nim - idtv (integrated digital tv) - digital satellite stb - pc-tv accessories - pvr, dvd, and blue ray disc recorders
digital demodulator copyright ? 2015 by silicon laboratories 10.29.2015 silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. SI2166-B22 dvb-s/s2 satellite tv demodulator selected electrical specifications (t a = C10 to 75 c) parameter test condition min typ max unit general input clock reference 4 30 mhz supported xtal frequency 16 30 mhz total power consumption dvb-s 1 230 mw dvb-s2 2 465 mw thermal resistance, ? ja 2 layer pcb 32 c/w 4 layer pcb 23 c/w power supplies v dd _ vcore 1.14 1.20 1.30 v v dd _ vana 3.00 3.30 3.60 v v dd _ vio 3.00 3.30 3.60 v notes: 1. t est conditions: 30 mbaud , cr = 7/8, parallel ts (at qef: ber = 2. 10 C4 ). 2. t est conditions: 32 mbaud, 3/5 code rate, 8psk, pilot s on , parallel ts, c/n at picture failure. pin assignments selection guide part number description SI2166-B22-gm satellite tv demodulator for dvb-s/s2, 7x7 mm qfn-48. si2166b (gnd_pad) qfn-48 7x7mm 34 35 36 21 22 23 24 3 4 5 33 20 6 32 7 28 29 30 31 27 8 9 10 11 12 15 16 17 18 19 40 39 38 37 41 46 45 44 43 42 mp_a s_adc_ip s_adc_in s_adc_qp s_adc_qn sda_mast scl_mast nc nc nc diseqc_out mp_b scl_host diseqc_cmd gnd sda_host ts_val diseqc_in ts_data[1] ts_data[5] ts_data[4] ts_data[3] gnd vdd_vio ts_data[2] ts_data[0]/ts_ser ts_clk ts_sync 47 14 ts_data[7] resetb xtal_i/clk_in xtal_o gnd vdd_vcore vdd_vana addr gnd gpio_0 48 13 2 1 26 25 ts_data[6] ts_err/gpio_1 clk_in_out gnd vdd_vcore vdd_vcore vdd_vio vdd_vcore mp_d mp_c
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